About

Overview 

 

Ethernity Networks was founded in 2004, and since then developed and delivered high end network processing technology for Carrier Ethernet Switching , including Broadband Access, Mobile Backhaul, Carrier Ethernet demarcations, and data centers targeting $2.5 billion network processing SoC market.

 

Operator and networking equipment manufacture find it hard to cope with the changing market need, that results with a need to design new products to accommodate the integration of new components with the right functionality and on the other hand to come up with new ASICs that will enable the support for these networking needs, however ASIC vendors find it hard to justified investment in new ASIC for the telecom , mobile backhaul markets, and data centers and on the other hand the advanced in FPGA technology enables the use of FPGA for mass deployment for the telecom, Ethernet access , mobile backhaul and data centers.

 

Ethernity Networks delivers innovative network processor SoC on FPGA/ ASIC, with hundreds of thousands of Systems deployed at global T-1/T-2 network operators based on Ethernity's ENET SoC , supporting up to 40Gbps on low cost FPGA that competes in price with off the shelf ASSPs, and soon will release a 200Gbps solution. The ENET SoC utilizes patented unique single flow based processing engine to process any data unit in variable size offering multi protocol interworking, traffic management, switching, routing, CFM/OAM and network processing, supporting up to 40Gbps on low cost FPGA that competes in price with off the shelf ASSPs, and soon will release a 200Gbps solution. 

 

Technology

 

Ethernity Networks technology is protected by several patents. The technology includes wire speed pipeline fabric processing architecture enabling the handling of any data units including legacy data, TDM, Fragments, ATM, and Ethernet. The ENET uses a single engine to process data fragment units simultaneously from many Ethernet ports, ATM , TDM or fragments, where fragment can come from Fabric Manager, EFM bonding, Radio interface, MLPPP, ATM , or other.

 

The ENET design is based on an extremely efficient architecture resulting in 80% die size reduction, and enabling an extremely cost effective implementation based on low cost FPGAs. The Ethernity  solution retains the flexibility and programmability of FPGAs, while providing a solution that is cost and power competitive with ASIC solutions.

 

On top of the Fabric processing capabilities, The technology includes search engine that support up to million entries without the need for expensive TCAM, wire speed easy-to-program packet editor, segmentation and reassembly technology support multiple size of fragment frames, hierarchical traffic management, wire speed multicast for advanced triple play services, and finally - the lowest cost architecture available today. Using the above technology the ENET perform Hierarchical Traffic Management and Quality of Service, Carrier Ethernet Switch , L3/L4 processing and forwarding, OAM/CFM hardware processor, pseudo wire (SAToP, CESoPSN, ATM, PPP), security, synchronization and clock recovery.

 

The following diagram depicts the ENET architecture. The ENET employ full separation between data path and control path and implement a zero copy mechanism for storing an ingress data unit at the DDR memory unit for purposes of packet re-ordering and queue management, then retrieving a fetched data unit from the DDR memory for data unit processing including packet encapsulation. Furthermore the Packet Generator and the Packet Analyzer are considered as an additional physical port and are part of the data path.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The control path engines are classification, ACL, search, policing, flow action rules, drop management and reordering, queue management, scheduling and shaping. The ENET pipeline architecture enables the integration of additional proprietary blocks or functionality into the control pipe.